Document Type
Article
Publication Date
5-2003
Publication Title
IEEE TRANSACTIONS ON COMMUNICATIONS
Abstract
High-speed broadband digital communication networks rely on digital multiplexing technology where clock synchronization, including processing, transmission, and recovery of the clock, is the critical technique. This paper interprets the process of clock synchronization in multiplexing systems as quantizing and coding the information of clock synchronization, interprets clock justification as timing sigma-delta modulation (TΔ-ΣM), and interprets the jitter of justification as quantization error. As a result, decreasing the quantization error is equivalent to decreasing the jitter of justification. Using this theory, the paper studies the existing jitter-reducing techniques in transmitters and receivers, presents some techniques that can decrease the quantization error (justification jitter) in digital multiplexing systems, and presents a new method of clock recovery.
Repository Citation
Wang, Hansheng; Qin, Xiaoyi; Zeng, Lieguang; and Xiong, Fuqin, "Coding, Decoding, and Recovery of Clock Synchronization in Digital Multiplexing System" (2003). Electrical and Computer Engineering Faculty Publications. 33.
https://engagedscholarship.csuohio.edu/enece_facpub/33
Original Citation
Hansheng Wang; Xiaoyi Qin; Lieguang Zeng; Fuqin Xiong; , "Coding, decoding, and recovery of clock synchronization in digital multiplexing system," Communications, IEEE Transactions on , vol.51, no.5, pp. 825- 831, May 2003
DOI
10.1109/TCOMM.2003.811432
Volume
51
Issue
5
